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Top 10 List of Week 10

1. Device driver
   More commonly known as a driver, a device driver or hardware driver is a group of files that enable one or more hardware devices to communicate with the computer’s operating system. Without drivers, the computer would not be able to send and receive data correctly to hardware devices, such as a printer.

2. Daisy Chain
   The daisy-chaining method involves connecting all the devices that can request an interrupt in a serial manner. This configuration is governed by the priority of the devices. The device with the highest priority is placed first followed by the second highest priority device and so on.

3. Peripheral Component Interconnect Express
   Peripheral Component Interconnect Express (PCIe or PCI-E) is a serial expansion bus standard for connecting a computer to one or more peripheral devices. PCIe provides lower latency and higher data transfer rates than parallel busses such as PCI and PCI-X. Every device that’s connected to a motherboard with a PCIe link has its own dedicated point-to-point connection. This means that devices are not competing for bandwidth because they are not sharing the same bus.

4. Expansion Bus
   An input/output pathway from the CPU to peripheral devices. An expansion bus typically comprises a series of slots on the motherboard into which cards are inserted. PCI and PCI Express are common expansion buses in computers. See PCI, PCI Express, expansion card and PC data buses. See also bus extender.

5. Serial Attached SCSI
   A standard hardware interface for storage drives. Introduced in 2003, serial attached SCSI (SAS) superseded the parallel SCSI interface and is widely used in datacenters where large numbers of drives are required (see illustration below). SAS drives are generally faster than SATA drives and more reliable, but are also more costly. Although SATA drives can be connected to a SAS interface, SAS drives require an adapter to hook up to a SATA controller

6. Host Bus Adapter
   A host bus adapter (HBA) is a device that connects multiple peripheral devices with a computer. It works as an expansion card that is plugged into the computer to enable connection between the peripheral devices and computer.

7. Memory mapped I/O and Isolated I/O
   As a CPU needs to communicate with the various memory and input-output devices (I/O) as we know data between the processor and these devices flow with the help of the system bus. There are three ways in which system bus can be allotted to them :
   • Separate set of address, control and data bus to I/O and memory.
   • Have common bus (data and address) for I/O and memory but separate control lines.
   • Have common bus (data, address, and control) for I/O and memory. In first case it is simple because both have different set of address space and instruction but require more buses.
     Isolated I/O – Then we have Isolated I/O in which we Have common bus(data and address) for I/O and memory but separate read and write control lines for I/O. So when CPU decode instruction then if data is for I/O then it places the address on the address line and set I/O read or write control line on due to which data transfer occurs between CPU and I/O. As the address space of memory and I/O is isolated and the name is so. The address for I/O here is called ports. Here we have different read-write instruction for both I/O and memory.
     Memory Mapped I/O – In this case every bus in common due to which the same set of instructions work for memory and I/O. Hence we manipulate I/O same as memory and both have same address space, due to which addressing capability of memory become less because some part is occupied by the I/O.

8. Polling
   ts a protocol in which CPU steadily checks whether the device needs attention. Wherever device tells process unit that it desires hardware processing, in polling process unit keeps asking the I/O device whether or not it desires CPU processing. The CPU ceaselessly check every and each device hooked up thereto for sleuthing whether or not any device desires hardware attention.

9. Interrupt
   An interrupt is a hardware mechanism that enables CPU to detect that a device needs its attention. The CPU has a wire interrupt-request line which is checked by CPU after execution of every single instruction. When CPU senses an interrupt signal on the interrupt-request line, CPU stops its currently executing task and respond to the interrupt send by I/O device by passing the control to interrupt handler. The interrupt handler resolves the interrupt by servicing the device.

10. Difference between Maskable and Non Maskable Interrupt
    An interrupt is an event caused by a component other than the CPU. It indicates the CPU of an external event that requires immediate attention. Interrupts occur asynchronously. Maskable and non-maskable interrupts are two types of interrupts.
    • Maskable Interrupt : An Interrupt that can be disabled or ignored by the instructions of CPU are called as Maskable Interrupt.The interrupts are either edge-triggered or level-triggered or level-triggered. Eg: RST6.5,RST7.5,RST5.5 of 8085
    • Non-Maskable Interrupt : An interrupt that cannot be disabled or ignored by the instructions of CPU are called as Non-Maskable Interrupt.A Non-maskable interrupt is often used when response time is critical or when an interrupt should never be disable during normal system operation. Such uses include reporting non-recoverable hardware errors, system debugging and profiling and handling of species cases like system resets. Eg: Trap of 8085